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An 8 bit ISA to M20 converter

The ISA (Industry Standard Architecture) standard was adopted in the original PC-IBM computer and countless expansion cards have been developed for covering almost any need. We would like to discuss here the fabrication of an adapter which can be used to plug any standard 8 bit ISA expansion card on the Olivetti M20. Of course, the adapter is useful on adapting the hardware, but the software needs to be adapted too, and this is another business.

The schematics

Here is the schematics of the adapter card (rev. 3). You can click on the two images to obtain a version at a higher resolution.

Some pictures of the prototype

A picture of the adapter card. All chips are standard TTL, very easy to find. The ISA card is mounted in a small daughterboard, connected with the adapter via a 50 wires flat cable.

The adapter, seen more closely. This is our third version of the adapter, where we tried to solve some of the issues we had with the first two.

A closeup of the jumper configuration. The SRAM configuration proves to be quite effective, thus the jumpers for the memory mapping on the M20 side are not used anymore (as well as the decoding logic). It turns out that probably it would be a good idea to implement a software configuration of the mapping also on the ISA side, to allow accessing more than 16 KiB.

A little bit of manual wiring... That was the first attempt during the development stage and the circuit was still incomplete.

A photo of the card installed in a M20 system. The memory expansion described here can also be seen.

Another view of the installed adapter. The 14.31818 MHz crystal oscillator built around the BF244C JFET was still not present on the bord. This frequency was provided by the ISA bus and was used by some cards. It does not need to be synchronized with the system clock. Much of the decoding logic as well as the buffers were not installed yet.

A 3Com ethernet card mounted on the daughter-board.

How to write the software

The I/O ports

The Olivetti M20 can access to the I/O addresses of the ISA card in the following way:

• The access is always done at a byte level.
• Only the least significative byte of the data bus is transferred.
• An access at an even address on the ISA card is mapped to the following odd address at the M20 side. For example, M20 0x0281 corresponds to ISA 0x0280. This copes with the restriction that byte accesses at the M20 side should always be at odd addresses.
• An access at an odd address on the ISA card is mapped to the same odd address at the M20 side, but the most significative bit of the address is set. For example, M20 0x8281 corresponds to ISA 0x0281.

The data bus is buffered. The data/address output of the M20 is quite robust and can drive the flat cable, but when the ISA bus is driving the data bus, a buffer is required.

The buffer is IC10 and is activated when there is an I/O access and the A9 line is active. In other words, for addresses such as 0x200, 0x300, 0x600, 0x700, etc... That is fine for cards such as the EtherLink II that we used for our tests.

Memory access

When the address is decoded (via the *SRAM line or via the decoding logic, following the memory access jumper S2), the most 6 significative bits are sent to the ISA bus following the jumper configuration of S3.

In all memory configurations possible for the M20, the SRAM is located at address <5>C000. This is translated to the address on the ISA side configured by the 6 jumpers generating the most significative 6 bits of the address. The address width on the 8-bit ISA bus is 20 bit wide. This way, on the ISA side, the bits 14 to 20 are generated by the adapter, following the jumper configuration and the remaining bits are directly translated from the M20 address bus. That allows to access 16 KiB of onboard RAM on the ISA card.

Interrupt system

On the ISA side, the active interrupt is hardcoded to the IRQ5 line. On the M20 side, a jumper is available to select whether to activate the IR1 (COMVI2), IR2 (COMVI2) or IR7 (SYSINT) lines.

A complete example/test program

An example/test program has been written to see if an Olivetti M20 equipped with this adapter can access to an external ISA card. We chosen the 3Com 3C503 card (Etherlink II). The test program checks for the presence of the card, reads its MAC number and see if it corresponds to a 3Com address. The program is written in C, can be compiled by gcc and can be downloaded here. If you are curious about how to cross programming the Olivetti M20 using the gcc compiler, read this article.

The test program, running in an older version of the adapter. There is a problem here. Even though the MAC address of the Etherlink II card is recognized correctly as 3Com, there is an error during the I/O access. The address should be 0x26 60 8C 6A 1E 1C, instead of 0x26 60 8C 6A 7E 1C. Further investigation showed that that was due to the lack of buffering and there were some spurious transitions on the data bus when the computer was trying to read from the card.

The test program running with version 3 of the adapter. Here the MAC address is correct! We also ran some memory-access tests that were successful.

Conclusion

In this page, we presented an adapter that can be used to plug PC-ISA cards on the Olivetti M20. We plan to use it with an Etherlink II network adapter to connect the Olivetti M20 to a modern network.

It may be nice to reuse the decoding logic to detect the access to an I/O address. It can be useful to configure the adapter to map the SRAM to a software-configured place that can be changed on-the-fly, to allow a paged access to more than 16K on the ISA side.

Some work is still required. It may be nice to reuse the decoding logic to detect the access to an I/O address. It can be thus useful to configure the adapter to map the SRAM to a software-configured place that can be changed on-the-fly, to allow a paged access to more than 16K on the ISA side.

The existing decoding logic can be reused so that the upper 6 bits of the ISA address bus can be set by software. One can decode 6 bits of the I/O address with minimal effort with the circuit: for example decoding the pattern "x111 111x xxxx xxxx" would correspond to I/O address 0x7E01 (read only), and of course many others since only 6 bits are decoded. This may not be elegant, but it will work fine as there should not be conflicts both on the M20 and on the ISA side with such high I/O port addresses.

To configure the adapter to map the 8KiB SRAM block (address <5>C000 on the M20) to address 0xD80000 on the ISA bus, the code would only have to write on the I/O port 0x7E01 the data 0xD8, where the 6 most significative bits will be used and latched by the adapter.

Page log

January 25, 2012 - Creation of the page with the second version of the adapter.

February 3, 2018 - Updated to a new version of the adapter (V3), to correct issues with I/O and memory access. The first two issues of the card had many issues. The most important one was that the memory mapping on the M20 side was done using segment 7 that is not free in an expanded machine. In the meanwhile, Dwight improved our knowledge of the (weird) memory mapping of the Olivetti M20 and found that it would have been wise to exploit the SRAM mapping. Some issues with I/O access have been solved and buffering of data signals has been adopted. Here you can download an archive with the schematics of version 2 of the adapter (FidoCadJ file format). And here are the same in PNG: Page 1 and Page 2. Do not use them! They will not work properly.

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